Solving Routing and Stack-Up Problems in High-Frequency PCB Design

Designing high-frequency PCBs presents unique challenges, particularly in routing and stack-up configuration. Proper planning and execution are essential to ensure signal integrity and optimal performance. Below, we explore common problems and strategies to address them.

Signal integrity primarily relates to impedance matching. Factors affecting impedance matching include signal source architecture, output impedance, trace characteristic impedance, load characteristics, and topology. Solutions involve termination and adjusting the trace topology. High speed designs are more prone to EMI/EMC, see how to improve the EMI-EMC performance of your PCB through a better layout design.

Routing Challenges in High-Frequency PCBs:

High-frequency circuits are highly sensitive to electromagnetic interference (EMI) and crosstalk, making precise routing critical. Poor routing can lead to signal degradation, increased noise, and functionality issues. Some solutions to which are:

• Impedance Control: Maintain consistent trace impedance by using proper trace width and spacing based on the PCB material and signal frequency.

• Minimize Crosstalk: Keep high-speed signal traces apart and use differential pairs to reduce noise.

• Avoid Signal Reflection: Match trace lengths for differential pairs and ensure proper termination.

• Reduce Via Usage: Limit via count to prevent signal integrity loss and unnecessary delays.

Manual v/s Automatic Routing for High-Speed Signals?

Most advanced PCB routing software includes automatic routers with configurable constraints to control routing methods and the number of vias. The capabilities of routing engines and the constraints available vary significantly between different EDA companies. For example, the ability to control the serpentine routing (zigzag) pattern or the spacing between differential pairs may differ.

This variability affects whether the automatically routed traces align with the designer's intent. Additionally, the ease of manual adjustment is closely related to the routing engine's capability, such as the ability to push traces, vias, or even traces near copper pours. Therefore, selecting a routing engine with strong capabilities is the key to resolving these issues.

Tips to achieve better routing in HF PCB design:

1. Separate analog and digital sections: Generally, separating digital and analog grounds is correct. It is important to ensure that signal traces do not cross over separated regions (moats), and to avoid excessive return current path lengths for power and signals.

2. Routing Crystal oscillators: They are analog positive feedback oscillation circuits. To generate stable oscillation signals, loop gain and phase specifications must be met. These oscillation specifications are susceptible to interference, and even adding ground guard traces may not completely isolate the interference. If the oscillator is placed too far, noise on the ground plane can affect the positive feedback oscillation circuit. Therefore, the crystal oscillator must be placed as close as possible to the chip.

3. EMI Reduction: The fundamental principle is that resistors, capacitors, or ferrite beads added for EMI mitigation should not cause non-compliance with the signal's electrical characteristics. It is better to prioritize solving or reducing EMI problems using routing arrangements and PCB layer stacking techniques, such as routing high-speed signals on internal layers. Resistors, capacitors, or ferrite beads should be used as a last resort to minimize harm to signal integrity.

What is Differential Routing?

Differential signaling, also known as differential signals, uses two completely identical and oppositely polarized signals to transmit one piece of data. The decision is based on the voltage difference between the two signals. To ensure that the two signals are fully consistent, the routing must maintain parallelism, with uniform line width and spacing.

Differential pair routing should be appropriately close and parallel. The spacing affects the differential impedance, a critical design parameter. Parallelism ensures consistent differential impedance. Variations in spacing can lead to inconsistent differential impedance, affecting signal integrity and timing delay.

How to Perform Differential Routing in a Design?

Differential pair routing requires two key considerations: ensuring equal trace lengths for the pair and maintaining constant spacing (determined by differential impedance) between the two traces. These traces should remain parallel. Parallel routing can be implemented in two ways: side-by-side on the same layer or over-under on adjacent layers. The side-by-side method is more commonly used.

• Differential routing for a clock signal with a single output:  Differential routing only makes sense when both the signal source and the receiver are differential signals. Therefore, it is not possible to use differential routing for a clock signal with a single output.

• Concept of matching resistor: A matching resistor is typically added between the differential pair at the receiver. The resistor value should match the differential impedance to improve signal quality.

• Ground wire between differential pair: Generally, ground wires should not be added between differential signals. This is because the primary advantage of differential signals is their mutual coupling, which brings benefits like flux cancellation and noise immunity. Adding ground wires in the middle would disrupt the coupling effect.

Copper Pouring in PCB Layers:  

In most cases, the copper fill in blank areas is connected to ground. However, when filling copper near high-speed signal lines, care must be taken regarding the distance between the copper fill and the signal lines, as the copper fill can slightly reduce the characteristic impedance of the traces. Additionally, ensure that the copper fill does not affect the characteristic impedance of other layers, such as in dual stripline configurations.

1. EMC (Electromagnetic Compatibility): Large areas of ground or power copper pouring act as shields. Certain special grounds, such as PGND, provide protective functions.

2. PCB manufacturing requirements: To ensure effective plating or to prevent deformation during lamination, copper is poured on PCB layers with fewer traces.

3. Signal integrity requirements: Copper pouring provides a complete return path for high-frequency digital signals and reduces the need for DC network traces. It is also used for heat dissipation and to meet special component mounting requirements.

What is a "Signal Return Path"?

The signal return path, also known as return current, refers to the path through which the current flows back to the driver. In high-speed digital signal transmission, the signal travels from the driver along the PCB transmission line to the load, and then returns from the load through the shortest path via the ground or power layer to the driver. This returning signal is referred to as the signal return path.

Dr. Johnson explained in his book that high-frequency signal transmission is essentially a process of charging the dielectric capacitance between the transmission line and the DC layer. Signal Integrity (SI) analysis examines the electromagnetic properties of this field and their coupling.

Stack-Up Problems in High-Frequency PCBs

For a 4-layer board, defining a free pad or via as multilayer ensures it appears on all four layers. If defined as top layer only, it will appear exclusively on the top. Incorrect layer stack-ups can exacerbate EMI, impedance mismatches, and thermal issues, affecting the board's performance. Some solutions to which are:

• Optimize Layer Configuration: Use dedicated ground and power planes to improve EMI shielding and maintain signal integrity.

• Dielectric Material Selection: Choose materials with a low dissipation factor (Df) and stable dielectric constant (Dk) for minimal signal loss.

• Plan for Signal Layers: Ensure critical high-frequency signals have adjacent reference planes to minimize noise and crosstalk.

• Thermal Management: Use copper planes and thermal vias to dissipate heat efficiently.

Example: Power Handling on a 12-layer PCB with three power layers (2.2V, 3.3V, 5V):

Having the three power supplies on three separate layers improves signal quality since cross-plane layer division is unlikely. Cross-plane division is a critical factor affecting signal quality, although simulation software generally ignores it. For power and ground planes, both are equivalent for high-frequency signals.

In practice, besides considering signal quality, factors such as power plane coupling (utilizing adjacent ground planes to reduce AC impedance of power planes) and symmetric layer stacking should also be considered.

How can stack-up arrangements help reduce EMI issues?

EMI must be addressed at the system level; PCB alone cannot solve all issues. Regarding stack-up design for EMI reduction, the goal is to provide the shortest return path for signals, minimize coupling area, and suppress differential-mode interference.

Additionally, tightly coupling the ground and power layers, with the power layer appropriately recessed relative to the ground layer, helps mitigate common-mode interference.

High-Frequency Material Selection

Choosing PCB material requires finding a balance between meeting design requirements, manufacturability, and cost. Design requirements include electrical and mechanical aspects. When designing very high-speed PCBs (frequencies greater than GHz), material considerations become more critical.

For example, commonly used FR-4 material may cause significant signal attenuation due to dielectric loss at frequencies of several GHz, making it unsuitable. From an electrical perspective, the dielectric constant and dielectric loss of the material must be compatible with the designed frequency. Materials like FR-4 may not suffice for ultra-high frequencies due to their higher Df and Dk variations. Some solutions to this problem are:

• Use specialized high-frequency laminates like Rogers, Isola, or Taconic that support stable signal transmission.

• Validate material compatibility with manufacturing processes to avoid delamination or warpage.

Tips to avoid high-frequency interference?

The basic idea of avoiding high-frequency interference is to minimize electromagnetic field interference from high-frequency signals, also known as crosstalk. This can be achieved by increasing the distance between high-speed signals and analog signals or by adding ground guard/shunt traces next to analog signals. Additionally, pay attention to noise interference from digital ground to analog ground.

Simulation and Testing:

Manufacturers are using X-ray testing to detect issues such as etching or lamination defects. For finished boards after SMT assembly, ICT (In-Circuit Testing) is typically used, requiring ICT test points to be added during PCB design. If problems arise, specialized X-ray inspection equipment can identify whether faults were caused during manufacturing. Some solutions are:

• Employ simulation tools like HFSS or ADS to model signal behavior.

• Conduct Signal Integrity (SI) and Power Integrity (PI) analysis to validate design assumptions.

• Use Time Domain Reflectometry (TDR) and Vector Network Analyzers (VNA) for real-world validation.

By carefully addressing routing and stack-up challenges, high-frequency PCB designs can achieve reliable signal transmission, minimal noise, and consistent performance. Proper material selection, layer optimization, and thorough testing ensure your designs meet the demands of modern high-speed applications.

What are Test coupons?

Test coupons are used to measure the characteristic impedance of a manufactured PCB using a Time Domain Reflectometer (TDR) to ensure it meets design requirements. Typically, the controlled impedance includes single-ended lines and differential pairs. Therefore, the trace width and spacing on the test coupon (for differential pairs) must match the controlled lines on the PCB.

The most critical aspect is the location of the grounding point during measurement. To minimize the inductance of the ground lead, the TDR probe's grounding point is usually very close to the signal measurement point (probe tip). Thus, the distance and method of the measurement signal point and the grounding point on the test coupon must match the probe being used.

Test points in high-speed signals: Whether the signal quality is affected depends on how the test points are added and the speed of the signal. Generally, external test points (not using existing vias or DIP pins as test points) may be added directly on the trace or by pulling out a small branch from the trace.

In principle, test points should be as small as possible (while still meeting the requirements of the testing equipment), and branches should be kept as short as possible.

FAQ:

1. Can you recommend some books and resources on high-speed PCB design?

• “Speed Digital Design: A Handbook of Black Magic" by Howard Johnson.
• "Signal and Power Integrity – Simplified" by Eric Bogatin.
• "Electromagnetic Compatibility Engineering" by Henry W. Ott.

These books cover signal integrity, EMI, and practical design strategies. Online resources like Cadence, Keysight, and JLCPCB blogs also provide valuable tutorials and design tips.

2. Does flexible and rigid-flex board design require specialized software and standards?

Yes, designing flexible and rigid-flex PCBs often requires specialized software like Altium Designer, Cadence Allegro, or Mentor Graphics, as these tools support unique features like bend simulations and layer stack-up configurations. Standards such as IPC-2223 are essential for ensuring reliability, covering guidelines for material selection, bending tolerances, and trace routing.